This program is an extension of the previous program. This program will calculate the true-RMS value of voltage at the input ADC0 and ADC1 as much as 10 times a second. Thus, data from both input sampling will be updated every 100ms. To make the appropriate updates 10 times per second, we use the timer 0. This timer is precision operated (like we operate the precision frequency generator) to schedule the sampling process so that all sampling process on both inputs will take place at intervals 100ms. Every 100ms portc2 will become high. This activity is regulated by timer0. High logic of that port will activy sampling subroutines. After the sampling process completed, portc2 will be low again.
To observe the accuracy sampling schedule, users can measure the output frequency of this port. This port emits a clock signal with frequency of 10Hz. During the sampling process, this port will be high. This high logic duration (tH) is the sampling period, i.e. 20ms. Users can check the accuracy of this port to determine the sampling duration.
Note that sampling duration must equel to the voltage period.
Clock signal duty cycle in this port describes the load time of the microcontroller. The higher clock signal duty cycle, the higher the load time of the microcontroller. If the duty cycle is low, we still can insert other subroutines to run on the sidelines of the overall sampling process. These subroutines will fill the remaining time until the hose is fully loaded, that is 100ms. In fact, although the duty cycle approaching 100% (microcontroller load time already high), we were still able to insert other subroutines to be executed when the CPU waiting for the completion of the ADC conversion.
In this program, the one period of voltage (50Hz) was sampled 64 times. This means, each of the input signal would be sampled with a frequency of 64X50Hz = 3200Hz. This program sampled two inputs. So, the total frequency of sampling is 2X3200 Hz = 6400Hz. This means that the sampling process should happen every 156.25 microseconds. The sampling period is set by a timer 1 had been made in precision.
See also Measure true-RMS of Voltage and Current Grid
To observe the accuracy sampling schedule, users can measure the output frequency of this port. This port emits a clock signal with frequency of 10Hz. During the sampling process, this port will be high. This high logic duration (tH) is the sampling period, i.e. 20ms. Users can check the accuracy of this port to determine the sampling duration.
Note that sampling duration must equel to the voltage period.
Clock signal duty cycle in this port describes the load time of the microcontroller. The higher clock signal duty cycle, the higher the load time of the microcontroller. If the duty cycle is low, we still can insert other subroutines to run on the sidelines of the overall sampling process. These subroutines will fill the remaining time until the hose is fully loaded, that is 100ms. In fact, although the duty cycle approaching 100% (microcontroller load time already high), we were still able to insert other subroutines to be executed when the CPU waiting for the completion of the ADC conversion.
In this program, the one period of voltage (50Hz) was sampled 64 times. This means, each of the input signal would be sampled with a frequency of 64X50Hz = 3200Hz. This program sampled two inputs. So, the total frequency of sampling is 2X3200 Hz = 6400Hz. This means that the sampling process should happen every 156.25 microseconds. The sampling period is set by a timer 1 had been made in precision.
See also Measure true-RMS of Voltage and Current Grid
Download .asm and hex code.
How to extend this work forward?
We can display true-RMS value to the LCD, or send the data to a PC via the serial port.
How to extend this work forward?
We can display true-RMS value to the LCD, or send the data to a PC via the serial port.
We can also increase the sampling frequency or use full resolution of ADC.
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